Re: [PATCH] virtio_pci: use PAGE_SIZE for pci vring align

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On Thu, Nov 10, 2022 at 02:11:11PM +0800, Xianting Tian wrote:
> As the comments of VIRTIO_PCI_VRING_ALIGN shows, we should use
> PAGE_SZIE not the hard code 4096.
> 
> Signed-off-by: Xianting Tian <xianting.tian@xxxxxxxxxxxxxxxxx>


where does it show this?
what is the problem you are trying to solve?
PAGE_SIZE is generally not valid in uapi

> ---
>  include/uapi/linux/virtio_pci.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h
> index f703afc7ad31..ed5f678c682b 100644
> --- a/include/uapi/linux/virtio_pci.h
> +++ b/include/uapi/linux/virtio_pci.h
> @@ -90,7 +90,7 @@
>  
>  /* The alignment to use between consumer and producer parts of vring.
>   * x86 pagesize again. */
> -#define VIRTIO_PCI_VRING_ALIGN		4096
> +#define VIRTIO_PCI_VRING_ALIGN		PAGE_SIZE
>  
>  #endif /* VIRTIO_PCI_NO_LEGACY */
>  
> -- 
> 2.17.1

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