On 05.08.20 16:12, peterz@xxxxxxxxxxxxx wrote:
On Wed, Aug 05, 2020 at 03:59:40PM +0200, Marco Elver wrote:
On Wed, Aug 05, 2020 at 03:42PM +0200, peterz@xxxxxxxxxxxxx wrote:
Shouldn't we __always_inline those? They're going to be really small.
I can send a v2, and you can choose. For reference, though:
ffffffff86271ee0 <arch_local_save_flags>:
ffffffff86271ee0: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
ffffffff86271ee5: 48 83 3d 43 87 e4 01 cmpq $0x0,0x1e48743(%rip) # ffffffff880ba630 <pv_ops+0x120>
ffffffff86271eec: 00
ffffffff86271eed: 74 0d je ffffffff86271efc <arch_local_save_flags+0x1c>
ffffffff86271eef: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
ffffffff86271ef4: ff 14 25 30 a6 0b 88 callq *0xffffffff880ba630
ffffffff86271efb: c3 retq
ffffffff86271efc: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
ffffffff86271f01: 0f 0b ud2
ffffffff86271a90 <arch_local_irq_restore>:
ffffffff86271a90: 53 push %rbx
ffffffff86271a91: 48 89 fb mov %rdi,%rbx
ffffffff86271a94: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
ffffffff86271a99: 48 83 3d 97 8b e4 01 cmpq $0x0,0x1e48b97(%rip) # ffffffff880ba638 <pv_ops+0x128>
ffffffff86271aa0: 00
ffffffff86271aa1: 74 11 je ffffffff86271ab4 <arch_local_irq_restore+0x24>
ffffffff86271aa3: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
ffffffff86271aa8: 48 89 df mov %rbx,%rdi
ffffffff86271aab: ff 14 25 38 a6 0b 88 callq *0xffffffff880ba638
ffffffff86271ab2: 5b pop %rbx
ffffffff86271ab3: c3 retq
ffffffff86271ab4: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
ffffffff86271ab9: 0f 0b ud2
Blergh, that's abysmall. In part I suspect because you have
CONFIG_PARAVIRT_DEBUG, let me try and untangle that PV macro maze.
Probably. I have found the following in my kernel:
fffffff81540a5f <arch_local_save_flags>:
ffffffff81540a5f: ff 14 25 40 a4 23 82 callq *0xffffffff8223a440
ffffffff81540a66: c3 retq
Juergen
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