On 3/20/20 3:12 PM, Joerg Roedel wrote:
> On Fri, Mar 20, 2020 at 02:02:13PM -0700, Dave Hansen wrote:
>> It *never* flushes global pages. For a generic function like this, that
>> seems pretty dangerous because the PTEs it goes after could quite easily
>> be Global. It's also not _obviously_ correct if PCIDs are in play
>> (which I don't think they are on AMD).
>>
>> A flush_tlb_global() is probably more appropriate. Better yet, is there
>> a reason not to use flush_tlb_kernel_range()? I don't think it's
>> necessary to whack the entire TLB for one PTE set.
>
> This code runs before the actual kernel image is decompressed, so there
> is no PCID and no global pages (I think CR4.PGE is still 0). So a
> cr3-write is enough to flush the TLB. Also the TLB-flush helpers of the
> running kernel are not available here.
Geez, I always forget about the compressed code. :) Good point about PCIDs.
In any case, I thought this all came through initialize_identity_maps(),
which does, for instance:
mapping_info.page_flag = __PAGE_KERNEL_LARGE_EXEC | sme_me_mask;
Where:
#define __PAGE_KERNEL_LARGE_EXEC (__PP|__RW| 0|___A| 0|___D|_PSE|___G)
That looks like it has the Global bit set. Does that not apply here
somehow?
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