Zachary Amsden wrote:
> For APICs, we have two operations - APICRead and APICWrite. It is
> nice and clean, and plugs in very easily to the APIC accessors
> available in Linux.
>
> Is this not clean?
Sure, that's clean, From that perspective the apic is a bunch of
registers backed by a state machine or something. It's not particularly
clean from a high-level interface perspective because those calls don't
mean anything, but that just means pv_ops is the wrong interface for
those calls. genapic, from its name alone, sounds like it should be the
right place to hook in at that level; if it isn't, it sounds like the
right starting place.
But...
> We just don't drive the local timer interrupts through the APIC, we
> make hypercalls to schedule local timer alarms. Which is something we
> must do for UP kernels as well, which use the PIT / PIC. So there is
> a need for having clockevents code which doesn't program timers
> through the APIC.
Yes, but couldn't you, oh I don't know, have the virtual timer
interrupts come in on irq 97, and just register a handler for that irq
and use that ISR to drive the time stuff? Then its logically identical
to the Xen code or any other free-standing device driver.
Making your virtual timer device share interrupts with the (emulated)
real-time device seems to be making things messy (is that right, is that
the issue?). I don't see why UP vs SMP is an issue here at all, or why
the PIT gets involved in any way (and I don't mean that in a "I think
your design is idiotic" way, I mean that in a "I don't really understand
the problem domain, so I'm missing something in your explanations" way).
J
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