Andi Kleen wrote: > >> Our boot detection code looks like this. We use I/O port detection to >> reveal that we are running under VMware, and use a hidden MSR to enable >> paravirt mode. The problem with this is that choosing an MSR that is >> guaranteed not to trap on real hardware and also does not collide with >> existing MSRs is a problem, >> > > That sounds impossible for the native case. Either it is used by the > hardware or it traps. Anything else would be a CPU erratum. > Sort of. We could override reserved bits in existing MSRs, such as EFER, or undefined CPUID extensions. But anything we do that changes the processor architectural interface risks incompatibility with future processors. > >> and handling faults on an RDMSR which the >> processor decided to convert to a #GP is impossible this early during >> boot. >> > > It's not. We already handle exceptions during early boot. It's just > a bit ugly. > Agreed. Deliberately faulting here in the native case is pretty ugly, and I don't think we want to impose such a requirement. > > >> This may (and does) vary by processor. Hence, the I/O port >> detection as a failsafe. >> > > Peeking random io ports is dangerous - you can trip up > native hardware on some machines badly. > Yes, so we prefix all of this code with a third check - by probing for the VMI ROM. A compatible PCI option ROM is only going to be detected on paravirtualized systems, and we do have a PCI vendor ID. So we really need a probe type interface that happens after the head.S entry point (while it could be in head.S, the code is simpler to understand when written in C). Zach
