i386 Transparent paravirtualization subarch patch #5 This change encapsulates descriptor and task register management. Diffs against: 2.6.13-rc4-mm1 Signed-off-by: Zachary Amsden <zach@xxxxxxxxxx> Index: linux-2.6.13/include/asm-i386/desc.h =================================================================== --- linux-2.6.13.orig/include/asm-i386/desc.h 2005-08-08 17:31:59.000000000 -0700 +++ linux-2.6.13/include/asm-i386/desc.h 2005-08-08 17:36:35.000000000 -0700 @@ -33,19 +33,6 @@ extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; -#define load_TR_desc() asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8)) -#define load_LDT_desc() asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8)) - -#define load_gdt(dtr) asm volatile("lgdtl %0"::"m" (*dtr)) -#define load_idt(dtr) asm volatile("lidtl %0"::"m" (*dtr)) -#define load_tr(tr) asm volatile("ltr %0"::"mr" (tr)) -#define load_ldt(ldt) asm volatile("lldt %0"::"mr" (ldt)) - -#define store_gdt(dtr) asm ("sgdtl %0":"=m" (*dtr)) -#define store_idt(dtr) asm ("sidtl %0":"=m" (*dtr)) -#define store_tr(tr) asm ("str %0":"=mr" (tr)) -#define store_ldt(ldt) asm ("sldt %0":"=mr" (ldt)) - /* * This is the ldt that every process will get unless we need * something other than this. @@ -99,22 +86,10 @@ "1" (limit)); \ } while(0) -#define set_base(desc,base) _set_base((desc), (base)) -#define set_limit(desc,limit) _set_limit((desc), ((limit)-1)>>12) - -static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) -{ - _set_tssldt_desc(&get_cpu_gdt_table(cpu)[entry], (int)addr, - offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89); -} +#include <mach_desc.h> #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr) -static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size) -{ - _set_tssldt_desc(&get_cpu_gdt_table(cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82); -} - #define LDT_entry_a(info) \ ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) @@ -140,17 +115,6 @@ (info)->seg_not_present == 1 && \ (info)->useable == 0 ) -static inline void write_ldt_entry(struct desc_struct *ldt, int entry, __u32 entry_a, __u32 entry_b) -{ - ldt[entry].a = entry_a; - ldt[entry].b = entry_b; -} - -static inline void load_TLS(struct thread_struct *t, unsigned int cpu) -{ - memcpy(&get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN], t->tls_array, TLS_SIZE); -} - static inline void clear_LDT(void) { int cpu = get_cpu(); Index: linux-2.6.13/include/asm-i386/mach-default/mach_desc.h =================================================================== --- linux-2.6.13.orig/include/asm-i386/mach-default/mach_desc.h 2005-08-08 15:45:27.000000000 -0700 +++ linux-2.6.13/include/asm-i386/mach-default/mach_desc.h 2005-08-08 17:36:49.000000000 -0700 @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2005, VMware, Inc. + * Copyright (C) 1992-2004, Linus Torvalds and authors + * + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or + * NON INFRINGEMENT. See the GNU General Public License for more + * details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#ifndef __MACH_DESC_H +#define __MACH_DESC_H + +#define load_TR_desc() asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8)) +#define load_LDT_desc() asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8)) + +#define load_gdt(dtr) asm volatile("lgdtl %0"::"m" (*dtr)) +#define load_idt(dtr) asm volatile("lidtl %0"::"m" (*dtr)) +#define load_tr(tr) asm volatile("ltr %0"::"mr" (tr)) +#define load_ldt(ldt) asm volatile("lldt %0"::"mr" (ldt)) + +#define store_gdt(dtr) asm ("sgdtl %0":"=m" (*dtr)) +#define store_idt(dtr) asm ("sidtl %0":"=m" (*dtr)) +#define store_tr(tr) asm ("str %0":"=mr" (tr)) +#define store_ldt(ldt) asm ("sldt %0":"=mr" (ldt)) + +static inline unsigned int get_TR_desc(void) +{ + unsigned int tr; + __asm__ ("str %w0":"=q" (tr)); + return tr; +} + +static inline unsigned int get_LDT_desc(void) +{ + unsigned int ldt; + __asm__ ("sldt %w0":"=q" (ldt)); + return ldt; +} + +#define set_base(desc,base) _set_base((desc), (base)) +#define set_limit(desc,limit) _set_limit((desc), ((limit)-1)>>12) + +static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) +{ + _set_tssldt_desc(&get_cpu_gdt_table(cpu)[entry], (int)addr, + offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89); +} + +static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size) +{ + _set_tssldt_desc(&get_cpu_gdt_table(cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82); +} + +static inline void write_ldt_entry(struct desc_struct *ldt, int entry, __u32 entry_a, __u32 entry_b) +{ + ldt[entry].a = entry_a; + ldt[entry].b = entry_b; +} + +static inline void load_TLS(struct thread_struct *t, unsigned int cpu) +{ + memcpy(&get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN], t->tls_array, TLS_SIZE); +} + +#endif