Chris Wright wrote: >* Zachary Amsden (zach@xxxxxxxxxx) wrote: > > >>Does Xen assume page aligned descriptor tables? I assume from this >> >> > >Yes. > > > >>patch and snippets I have gathered from others, that is a yes, and other >>things here imply that DT pages are not shadowed. If so, Xen itself >>must have live segments in the GDT pages, so how do you allocate space >>for the per-CPU GDT pages on SMP? >> >> > >early during boot. > > Doesn't that require 16 pages per CPU? That seems excessive to impose on a native build. Perhaps we could get away with 1 page per CPU for the GDT on native boots and bump that up to 16 if compiling for a virtualized sub-architecture - i.e. move GDT to a page aligned struct for native (doesn't cost too much), and give it MACH_GDT_PAGES of space which is defined by the sub-architecture. Let's take this thread over to virtualization@xxxxxxxxxxxxxx as well. Zach
