> > We can't guarantee there is no other access on the AHB without disable
> > interrupt, would you think below operation will be more efficient than swp,
> > or any better solutions?
I don't know whether it would be more or less efficient, it rather
depends on the finer points of the architecture.
It might be that some of the accesses are already inside an interrupt
disabled block.
> > local_irq_save(flags);
local_irq_save() might only stop driver ISR being dispatched, in which
case you'd need to know whether the main ISR code does any AHB cycles.
Actually disabling interrupts might take more clocks than the RMW cycle.
> > readl(addr);
I think the read above need not be exactly the same address as the
write below (in which case a barrier is needed).
You could also add a small amount of code here, using the clock
cycles that would almost certainly be stalls in SWP were used.
Especially between back to back transfers.
> > writel(val, addr);
At this point you could write to other USB registers.
This code might be a win if there are multiple accesses.
> > local_irq_restore(flags);
>
> Does this work without modifications on PREEMPT_RT?
Disabling interrupts usually also disables pre-emption
(if only because you need an interrupt to get into a code
path that might do pre-emption).
Just commenting that SWP is used to ensure that the previous AHB cycle
is to the USB block (then refer to the errata) would allow other people
to consider other options without having to chase down the errata itself.
David
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