Hi Paul/Felipe, Any comment? Regards Pratyush On Fri, Nov 15, 2013 at 09:34:44AM +0530, Pratyush Anand wrote: > Hi, > > Patch "usb: dwc3: gadget: drop dwc3 manual phy control" says > > "Recent versions of the core, can suspend and resume the PHYs > automatically, so we don't need to fiddle with dwc3's Global PHY > registers at all." > > First part of the statement is true, but only when bit 17 of > GUSB3PIPECTL and bit 6 of GUSB2PHYCFG is set, no? > > Recommended reset value of this bit in DRD/OTG mode is '0' and in > other mode is '1'. Specs recommends to set this value after core > initialization is complete. > > So, shouldn't software always set these bits after core > initialization to take care of the controller where this bit was > not set at reset. > > Regards > Pratyush -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
