> From: Dinh Nguyen [mailto:dinguyen@xxxxxxxxxx] > Sent: Tuesday, August 27, 2013 2:09 PM > > On Tue, 2013-08-27 at 14:13 +0200, ZY - pavel wrote: > > On Tue 2013-08-27 12:22:59, Matthijs Kooijman wrote: > > > > > > What hardware are you working with? > > > > Very probably Altera Socfpga Cyclone V board. > > Yes, I am working on the Altera Socfpga Cyclone V devkit. It appears > that I did get the driver to work. The old driver had set the TX/RX FIFO > to 512, so I also modified the DWC2 driver to 512, then slowly walked it > up to 2560. This appears to be threshold for the TX/RX FIFO on the > SOCFPGA sytem. > > params->enable_dynamic_fifo = 1; > params->host_rx_fifo_size = 0xa00; > params->host_nperio_tx_fifo_size = 0xa00; > params->host_perio_tx_fifo_size = 0xa00; > > I still have to force the driver into Host Mode. > > I pushed a branch to git://git.rocketboards.org/linux-socfpga-next.git > socfpga-3.10_dwc2, in case you're interested. > > Also, the driver does not support Split Transactions yet in DMA mode > right? It does support splits in DMA mode. Splits in Descriptor DMA mode don't work because the HW does not support that. -- Paul ��.n��������+%������w��{.n�����{���)�� jg��� �����ݢj����G���� ���j:+v���w�m������w�������h�����٥
