On Fri, Mar 22, 2013 at 02:20:23PM +0100, Michael Grzeschik wrote: > The udc uses an shared dma memory space between hard and software. This > memory layout is described in ci13xxx_qh and ci13xxx_td which are marked > with the attribute ((packed)). > > The packed attribute leads the compiler to generate one byte operations > for addressing the mapped memory as it believes this memory has no > alignement issues as common streaming data. This appeares on armv5 > machines where the hardware does not support unaligned 32bit operations. > Compilers for newer ARMs will probably still generate 32bit operations, > as the hardware supports it. > > The Datasheet of the synopsys core describes, that some operations on > the mapped memory need to be atomic double word operations. I.e. the > next pointer addressing in the qhead, as otherwise the hardware could > read wrong data and totally stuck. > > This patch fixes that issue by addressing every mapped area operation > with explicit readl and writel operations where needed. It also adds an > wmb() for the prepared TD data before it gets enqueued into the qhead. The writel includes wmb(), the wmb() isn't needed if the last instruction is writel. Besides, please make sure all dQH/dTD mapped area access by readl/writel in this patch, we don't want to add missing in future. -- Best Regards, Peter Chen -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
