On Mon, 25 Mar 2013, Huang Rui wrote:
> Hi Alan,
>
> Thank you to take a look at this issue. Sorry to disturb you again.
> The PORT ENABLE(PORT_PE) bit in PORTSC register is not set when the
> port reset, in other words, host controller and device might not do
> alternating sequence of Chirp Ks and Chirp Js or not be detected. Am I
> right?
Yes.
> I found why the boot issue is not alway reproduced. Because
> sometimes ehci_hcd is not loaded before ohci_hcd.
>
> [ 25.068090] Warning! ehci_hcd should always be loaded before uhci_hcd and ohci_hcd, not after
>
> If ehci_hcd is loaded firstly, the USB Reader(in my side) is always
> detected as high speed device. Then I do below change and boot issue
> isn't encountered again.
>
> diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
> index 180a2b0..30fc91c 100644
> --- a/drivers/usb/host/ohci-hcd.c
> +++ b/drivers/usb/host/ohci-hcd.c
> @@ -1325,7 +1325,7 @@ static int __init ohci_hcd_mod_init(void)
> clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
> return retval;
> }
> -module_init(ohci_hcd_mod_init);
> +late_initcall(ohci_hcd_mod_init);
>
> static void __exit ohci_hcd_mod_exit(void)
> {
>
> But I think it's not a good solution. Have you any idea to have an
> appropriate way to make ehci_hcd loaded firstly?
In general there is no way to do it. Especially with modern kernels,
because what matters is ehci-pci, not ehci-hcd. And also because the
order of probing is not always the same.
I suppose you could build a kernel with CONFIG_USB_EHCI_HCD=y and
CONFIG_USB_EHCI_PCI=y but CONFIG_USB_OHCI_HCD=m. That might help.
Alan Stern
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