Re: Host controller TD breaking mechanism

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On Thu, Dec 06, 2012 at 08:49:08AM +0000, Nikunj Sanghani wrote:
> Hi,
> 
> Suppose one TD that has 5 TRBs and each has trb Length of 200 bytes
> except last Trb all have chain bit set to 1.
> Single TD contains 5 TRBs.
> 
> --------------------------------------
> |   -------------------------        | 
> |   |trnlen =200 chain=1    |  TRB=1 |
> |   -------------------------        |   
> |   -------------------------        |      
> |   |trnlen =200 chain=1    |  TRB=2 |      
> |   -------------------------        |      
> |   -------------------------        |      
> |   |trnlen =200 chain=1    |  TRB=3 |      
> |   -------------------------        |      
> |   -------------------------        |      
> |   |trnlen =200 chain=1    |  TRB=4 |      
> |   -------------------------        |     
> |   -------------------------        |      
> |   |trnlen =200 chain=0    |  TRB=5 |    
> |   -------------------------        |   
> --------------------------------------
> 
> Now in this case XHC should transfer individual TRBs to USB pipe 
> or it should wait till the completion of TD and 
> then transfer the chunk of data to USB pipe?

That's a hardware question, not a kernel driver question, right?

> Software will ring the doorbell after adding all TRB in TD 
> or software can ring the doorbell after loading one TRB of TD
> and after that add TRBs simultaneously on Ring?

What does the xhci driver to today in this case in your testing?

thanks,

greg k-h
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