>
> A simpler idea just occurred to me. All we need to do is change the
> line in ehci_reset() that assigns ehci->command.
>
> What it should do is mask out the bits that were set up in ehci_init().
> Those bits should be kept unchanged in ehci->command. The remaining
> bits should be set according to the value read from the USBCMD
> register.
>
> Would anyone like to code that up?
>
Hi Alan,
I think your below patch is ok, I will test it at usb-next branch next
Monday.
Index: xes/drivers/usb/host/ehci-hcd.c
===================================================================
--- xes.orig/drivers/usb/host/ehci-hcd.c
+++ xes/drivers/usb/host/ehci-hcd.c
@@ -352,7 +352,9 @@ static int ehci_reset (struct ehci_hcd *
if (ehci->debug)
dbgp_external_startup();
- ehci->command = ehci_readl(ehci, &ehci->regs->command);
+ ehci->command |= ehci_readl(ehci, &ehci->regs->command) &
+ ~(CMD_HIRD | CMD_ITHR_MASK | CMD_PPCEE | CMD_PARK |
+ CMD_PARK_MASK | CMD_FLSIZE_MASK);
ehci->port_c_suspend = ehci->suspended_ports =
ehci->resuming_ports = 0;
return retval;
Index: xes/include/linux/usb/ehci_def.h
===================================================================
--- xes.orig/include/linux/usb/ehci_def.h
+++ xes/include/linux/usb/ehci_def.h
@@ -68,18 +68,21 @@ struct ehci_regs {
/* EHCI 1.1 addendum */
#define CMD_HIRD (0xf<<24) /* host initiated resume duration */
+/* 23:16 is r/w intr rate, in microframes; default "8" == 1/msec */
+#define CMD_ITHR_MASK (0xff<<16) /* interrupt threshold control mask */
#define CMD_PPCEE (1<<15) /* per port change event enable */
#define CMD_FSP (1<<14) /* fully synchronized prefetch */
#define CMD_ASPE (1<<13) /* async schedule prefetch enable */
#define CMD_PSPE (1<<12) /* periodic schedule prefetch enable */
-/* 23:16 is r/w intr rate, in microframes; default "8" == 1/msec */
#define CMD_PARK (1<<11) /* enable "park" on async qh */
+#define CMD_PARK_MASK (3<<8) /* park mode count mask */
#define CMD_PARK_CNT(c) (((c)>>8)&3) /* how many transfers to park for */
#define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
#define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */
#define CMD_ASE (1<<5) /* async schedule enable */
#define CMD_PSE (1<<4) /* periodic schedule enable */
/* 3:2 is periodic frame list size */
+#define CMD_FLSIZE_MASK (3<<2) /* frame list size mask */
#define CMD_RESET (1<<1) /* reset HC not bus */
#define CMD_RUN (1<<0) /* start/stop HC */
> Alan Stern
>
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