> This will prevent dwc3.ko from ioremapping
> the entire memory space, thus preventing xHCI
> from requesting its own part of the address.
>
> Signed-off-by: Felipe Balbi <balbi@xxxxxx>
> ---
> drivers/usb/dwc3/core.c | 26 +++++++---
> drivers/usb/dwc3/core.h | 122
> +++++++++++++++++++++++------------------------
> 2 files changed, 80 insertions(+), 68 deletions(-)
>
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index e7c853a..3c69d1a 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -405,6 +405,7 @@ static void dwc3_core_exit(struct dwc3 *dwc)
> static int __devinit dwc3_probe(struct platform_device *pdev)
> {
> struct device_node *node = pdev->dev.of_node;
> + struct resource host_resource[2];
> struct resource *res;
> struct dwc3 *dwc;
> struct device *dev = &pdev->dev;
> @@ -431,7 +432,24 @@ static int __devinit dwc3_probe(struct
> platform_device *pdev)
> return -ENODEV;
> }
>
> - dwc->res = res;
> + irq = platform_get_irq(pdev, 0);
> + if (irq < 0) {
> + dev_err(dev, "missing IRQ\n");
> + return -ENODEV;
> + }
> +
> + host_resource[0].start = res->start;
> + host_resource[0].end = res->start + 0x7fff;
> + host_resource[0].flags = IORESOURCE_MEM;
You set the memory end region to end after 0x7fff, but later you assign it
to dwc->res , meaning that this is memory for all the dwc3 core and not
just for the host part.
> +
> + host_resource[1].start = irq;
> + host_resource[1].end = irq;
> + host_resource[1].flags = IORESOURCE_IRQ;
Adding the irq to the dwc->res is nice to have but I don't think it is
related to this patch and I don't see where you use it. Also it seems
redundant since of dwc->irq.
> +
> + dwc->res = host_resource;
I don't like the name host_resource, this array is the resources of all
the dwc3 not just the host part. Also seems that you set a pointer to
local scoped array, isn't this pointer will be invalid after probe will
finish ?
So, instead, maybe create a local array used for non xhci resource:
struct resource mem_res_exclude_xhci[1];
...
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
...
mem_res_exclude_xhci[0].start = res->start + 0xc100;
mem_res_exclude_xhci[0].end = res->end;
mem_res_exclude_xhci[0].flags = res.flags;
...
dwc->res = res;
res = mem_res_exclude_xhci;
...
(resource_size(res) - GLOBAL_REGS_START)
> +
> + /* Skip host address space */
> + res->start += 0xc100;
>
> regs = devm_request_and_ioremap(dev, res);
> if (!regs) {
> @@ -439,12 +457,6 @@ static int __devinit dwc3_probe(struct
> platform_device *pdev)
> return -ENOMEM;
> }
>
> - irq = platform_get_irq(pdev, 0);
> - if (irq < 0) {
> - dev_err(dev, "missing IRQ\n");
> - return -ENODEV;
> - }
> -
> spin_lock_init(&dwc->lock);
> platform_set_drvdata(pdev, dwc);
>
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index a32c2b5..0dc4dc4 100644
> --- a/drivers/usb/dwc3/core.h
> +++ b/drivers/usb/dwc3/core.h
> @@ -76,71 +76,71 @@
> #define DWC3_GSNPSREV_MASK 0xffff
>
> /* Global Registers */
> -#define DWC3_GSBUSCFG0 0xc100
> -#define DWC3_GSBUSCFG1 0xc104
> -#define DWC3_GTXTHRCFG 0xc108
> -#define DWC3_GRXTHRCFG 0xc10c
> -#define DWC3_GCTL 0xc110
> -#define DWC3_GEVTEN 0xc114
> -#define DWC3_GSTS 0xc118
> -#define DWC3_GSNPSID 0xc120
> -#define DWC3_GGPIO 0xc124
> -#define DWC3_GUID 0xc128
> -#define DWC3_GUCTL 0xc12c
> -#define DWC3_GBUSERRADDR0 0xc130
> -#define DWC3_GBUSERRADDR1 0xc134
> -#define DWC3_GPRTBIMAP0 0xc138
> -#define DWC3_GPRTBIMAP1 0xc13c
> -#define DWC3_GHWPARAMS0 0xc140
> -#define DWC3_GHWPARAMS1 0xc144
> -#define DWC3_GHWPARAMS2 0xc148
> -#define DWC3_GHWPARAMS3 0xc14c
> -#define DWC3_GHWPARAMS4 0xc150
> -#define DWC3_GHWPARAMS5 0xc154
> -#define DWC3_GHWPARAMS6 0xc158
> -#define DWC3_GHWPARAMS7 0xc15c
> -#define DWC3_GDBGFIFOSPACE 0xc160
> -#define DWC3_GDBGLTSSM 0xc164
> -#define DWC3_GPRTBIMAP_HS0 0xc180
> -#define DWC3_GPRTBIMAP_HS1 0xc184
> -#define DWC3_GPRTBIMAP_FS0 0xc188
> -#define DWC3_GPRTBIMAP_FS1 0xc18c
> -
> -#define DWC3_GUSB2PHYCFG(n) (0xc200 + (n * 0x04))
> -#define DWC3_GUSB2I2CCTL(n) (0xc240 + (n * 0x04))
> -
> -#define DWC3_GUSB2PHYACC(n) (0xc280 + (n * 0x04))
> -
> -#define DWC3_GUSB3PIPECTL(n) (0xc2c0 + (n * 0x04))
> -
> -#define DWC3_GTXFIFOSIZ(n) (0xc300 + (n * 0x04))
> -#define DWC3_GRXFIFOSIZ(n) (0xc380 + (n * 0x04))
> -
> -#define DWC3_GEVNTADRLO(n) (0xc400 + (n * 0x10))
> -#define DWC3_GEVNTADRHI(n) (0xc404 + (n * 0x10))
> -#define DWC3_GEVNTSIZ(n) (0xc408 + (n * 0x10))
> -#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
> -
> -#define DWC3_GHWPARAMS8 0xc600
> +#define DWC3_GSBUSCFG0 0x0000
> +#define DWC3_GSBUSCFG1 0x0004
> +#define DWC3_GTXTHRCFG 0x0008
> +#define DWC3_GRXTHRCFG 0x000c
> +#define DWC3_GCTL 0x0010
> +#define DWC3_GEVTEN 0x0014
> +#define DWC3_GSTS 0x0018
> +#define DWC3_GSNPSID 0x0020
> +#define DWC3_GGPIO 0x0024
> +#define DWC3_GUID 0x0028
> +#define DWC3_GUCTL 0x002c
> +#define DWC3_GBUSERRADDR0 0x0030
> +#define DWC3_GBUSERRADDR1 0x0034
> +#define DWC3_GPRTBIMAP0 0x0038
> +#define DWC3_GPRTBIMAP1 0x003c
> +#define DWC3_GHWPARAMS0 0x0040
> +#define DWC3_GHWPARAMS1 0x0044
> +#define DWC3_GHWPARAMS2 0x0048
> +#define DWC3_GHWPARAMS3 0x004c
> +#define DWC3_GHWPARAMS4 0x0050
> +#define DWC3_GHWPARAMS5 0x0054
> +#define DWC3_GHWPARAMS6 0x0058
> +#define DWC3_GHWPARAMS7 0x005c
> +#define DWC3_GDBGFIFOSPACE 0x0060
> +#define DWC3_GDBGLTSSM 0x0064
> +#define DWC3_GPRTBIMAP_HS0 0x0080
> +#define DWC3_GPRTBIMAP_HS1 0x0084
> +#define DWC3_GPRTBIMAP_FS0 0x0088
> +#define DWC3_GPRTBIMAP_FS1 0x008c
> +
> +#define DWC3_GUSB2PHYCFG(n) (0x0100 + (n * 0x04))
> +#define DWC3_GUSB2I2CCTL(n) (0x0140 + (n * 0x04))
> +
> +#define DWC3_GUSB2PHYACC(n) (0x0180 + (n * 0x04))
> +
> +#define DWC3_GUSB3PIPECTL(n) (0x01c0 + (n * 0x04))
> +
> +#define DWC3_GTXFIFOSIZ(n) (0x0200 + (n * 0x04))
> +#define DWC3_GRXFIFOSIZ(n) (0x0280 + (n * 0x04))
> +
> +#define DWC3_GEVNTADRLO(n) (0x0300 + (n * 0x10))
> +#define DWC3_GEVNTADRHI(n) (0x0304 + (n * 0x10))
> +#define DWC3_GEVNTSIZ(n) (0x0308 + (n * 0x10))
> +#define DWC3_GEVNTCOUNT(n) (0x030c + (n * 0x10))
> +
> +#define DWC3_GHWPARAMS8 0x0500
>
> /* Device Registers */
> -#define DWC3_DCFG 0xc700
> -#define DWC3_DCTL 0xc704
> -#define DWC3_DEVTEN 0xc708
> -#define DWC3_DSTS 0xc70c
> -#define DWC3_DGCMDPAR 0xc710
> -#define DWC3_DGCMD 0xc714
> -#define DWC3_DALEPENA 0xc720
> -#define DWC3_DEPCMDPAR2(n) (0xc800 + (n * 0x10))
> -#define DWC3_DEPCMDPAR1(n) (0xc804 + (n * 0x10))
> -#define DWC3_DEPCMDPAR0(n) (0xc808 + (n * 0x10))
> -#define DWC3_DEPCMD(n) (0xc80c + (n * 0x10))
> +#define DWC3_DCFG 0x0600
> +#define DWC3_DCTL 0x0604
> +#define DWC3_DEVTEN 0x0608
> +#define DWC3_DSTS 0x060c
> +#define DWC3_DGCMDPAR 0x0610
> +#define DWC3_DGCMD 0x0614
> +#define DWC3_DALEPENA 0x0620
> +#define DWC3_DEPCMDPAR2(n) (0x0700 + (n * 0x10))
> +#define DWC3_DEPCMDPAR1(n) (0x0704 + (n * 0x10))
> +#define DWC3_DEPCMDPAR0(n) (0x0708 + (n * 0x10))
> +#define DWC3_DEPCMD(n) (0x070c + (n * 0x10))
>
> /* OTG Registers */
> -#define DWC3_OCFG 0xcc00
> -#define DWC3_OCTL 0xcc04
> -#define DWC3_OEVTEN 0xcc08
> -#define DWC3_OSTS 0xcc0C
> +#define DWC3_OCFG 0x0b00
> +#define DWC3_OCTL 0x0b04
> +#define DWC3_OEVTEN 0x0b08
> +#define DWC3_OSTS 0x0b0C
>
I don't like changing all the addresses of the registers.
This is important to keep the registers offsets as they appear
in the dwc3 spec, so it will be possible to follow the spec.
Instead I suggest changing the functions dwc3_readl and dwc3_writel
so these functions will automatically fix the base address...
> /* Bit fields */
>
> --
> 1.7.10
>
>
Thanks,
Ido
--
Consultant for Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum
--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
