On Wed, Mar 21, 2012 at 04:03:24PM +0100, Lukasz Majewski wrote: > On Wed, 21 Mar 2012 14:59:47 +0200 > Felipe Balbi <balbi@xxxxxx> wrote: > > Hi Felipe, > > > > > + /* we must now enable ep0 ready for host detection and then > > > + * set configuration. */ > > > > comment style > > I've sticked to the whole file comment style :-). > > Version 3 of this patch series will provide new, correct comment style. > > Moreover the extra patch changing all other comments to new style will > be provided. that's good, thanks > > > + /* set the PLL on, remove the HNP/SRP and set the PHY */ > > > + writel(S3C_GUSBCFG_PHYIf16 | S3C_GUSBCFG_TOutCal(7) | > > > + (0x5 << 10), hsotg->regs + S3C_GUSBCFG); > > > > looks like this should be moved to a PHY driver. > > For me it looks like internal part of the DWC2 core, not usb PHY part. > I think GUSBCFG register access shall be not moved. hmmm, indeed. It's DWC2's register, my bad :-) > > > > + /* looks like soft-reset changes state of FIFOs */ > > > + s3c_hsotg_init_fifo(hsotg); > > > > some errata ? > > Nope, the comment is misleading - fifo initialization is needed in this > point. ok, please update that one too ;-) > > > + writel(S3C_GINTSTS_DisconnInt | S3C_GINTSTS_SessReqInt | > > > + S3C_GINTSTS_ConIDStsChng | S3C_GINTSTS_USBRst | > > > + S3C_GINTSTS_EnumDone | S3C_GINTSTS_OTGInt | > > > + S3C_GINTSTS_USBSusp | S3C_GINTSTS_WkUpInt | > > > + S3C_GINTSTS_GOUTNakEff | S3C_GINTSTS_GINNakEff | > > > + S3C_GINTSTS_ErlySusp, > > > + hsotg->regs + S3C_GINTMSK); > > > > I would like to see the CaMeLcAsInG getting fixed up at some point too > > ;-) > Will do ;-) thanks mate ;-) -- balbi
Attachment:
signature.asc
Description: Digital signature
