Fix checking of CTRL_PHY_CLK_VALID bit break on some platform on which
there is not USB CTRL_PHY_CLK_VALID bit.
- P1023/P3041/P5020 etc,have this bit
- P3060/4080/PSC913x do have this bit, but not mentioned in RM.
- P1022(perhaps and other) has no this bit
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@xxxxxxxxxxxxx>
---
drivers/usb/host/ehci-fsl.c | 24 ++++++++++++++----------
1 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index c26a82e..5ba3ea4 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -244,7 +244,11 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
struct usb_hcd *hcd = ehci_to_hcd(ehci);
struct fsl_usb2_platform_data *pdata;
void __iomem *non_ehci = hcd->regs;
- u32 temp;
+ u32 temp, chip, rev, svr;
+
+ svr = mfspr(SPRN_SVR);
+ chip = svr >> 16;
+ rev = (svr >> 4) & 0xf;
pdata = hcd->self.controller->platform_data;
@@ -273,12 +277,6 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
- unsigned int chip, rev, svr;
-
- svr = mfspr(SPRN_SVR);
- chip = svr >> 16;
- rev = (svr >> 4) & 0xf;
-
/* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
ehci->has_fsl_port_bug = 1;
@@ -300,9 +298,15 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
}
- if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID)) {
- printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
- return -ENODEV;
+ /* There is no CTRL_PHY_CLK_VALID bit on some platforms, e.g. P1022 */
+#define SVR_P1022_N_ID 0x80E6
+#define SVR_P1022_S_ID 0x80EE
+ if (chip != SVR_P1022_N_ID && chip != SVR_P1022_S_ID) {
+ if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
+ CTRL_PHY_CLK_VALID)) {
+ printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
+ return -ENODEV;
+ }
}
return 0;
}
--
1.7.0.4
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