omap4430_phy_power is modified to be self contained in that it enables clock
and power up the phy in addition to modifying the USBOTGHS_CONTROL register
during power on. Similarly while powering down, it disables clock and
power down the phy.
Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx>
Signed-off-by: Balaji T K <balajitk@xxxxxx>
Signed-off-by: Partha Basak <p-basak2@xxxxxx>
---
arch/arm/mach-omap2/omap_phy_internal.c | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 58775e3..a828833 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -110,6 +110,13 @@ int omap4430_phy_set_clk(struct device *dev, int on)
int omap4430_phy_power(struct device *dev, int ID, int on)
{
if (on) {
+ /* enabled the clocks */
+ omap4430_phy_set_clk(dev, 1);
+ /* power on the phy */
+ if (__raw_readl(ctrl_base + CONTROL_DEV_CONF) & PHY_PD) {
+ __raw_writel(~PHY_PD, ctrl_base + CONTROL_DEV_CONF);
+ msleep_interruptible(200);
+ }
if (ID)
/* enable VBUS valid, IDDIG groung */
__raw_writel(AVALID | VBUSVALID, ctrl_base +
@@ -125,6 +132,10 @@ int omap4430_phy_power(struct device *dev, int ID, int on)
/* Enable session END and IDIG to high impedance. */
__raw_writel(SESSEND | IDDIG, ctrl_base +
USBOTGHS_CONTROL);
+ /* Power down the phy */
+ __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
+ /* Disable the clocks */
+ omap4430_phy_set_clk(dev, 0);
}
return 0;
}
--
1.7.0.4
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