On Thu, Jul 07, 2011 at 09:58:00AM +0900, Yoshihiro Shimoda wrote: > R8A66597 has the pin of WR0 and WR1. So, if one write-pin of CPU > connects to the pins, we have to change the setting of FIFOSEL > register in the controller. If we don't change the setting, > the controller cannot send the data of odd length. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> applied, thanks Next time, please format your patches in a proper series and if you need to resend, resend them all. To format and send in a series you can use: $ git format-patch -o patches <start>..<end> $ git send-email --to balbi@xxxxxx --cc linux-usb@xxxxxxxxxxxxxxx \ --cc gregkh@xxxxxxx patches/ -- balbi
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