On Tue, 17 May 2011, Jan Andersson wrote:
> This patch adds support for big endian GRUSBHC UHCI controllers.
> The HCD bus glue will probe the register interface to determine
> the endianness of the controller.
>
> Tested on GR-LEON4-ITX board which has a controller with little endian
> interface and on custom LEON3 board with a BE controller.
...
> --- a/drivers/usb/host/uhci-grlib.c
> +++ b/drivers/usb/host/uhci-grlib.c
> @@ -25,6 +25,22 @@ static int uhci_grlib_init(struct usb_hcd *hcd)
> {
> struct uhci_hcd *uhci = hcd_to_uhci(hcd);
>
> + /* Probe to see if we have a big or little endian controller. Bit 7
> + * of PORTSC is always 1 and 15:13 are always zero, so we have:
> + *
> + * 1------- 000----- -------- 000----- => Little endian mode HC
> + * 000----- 1------- 000----- -------- => Big endian mode HC
> + *
> + * We also need to take into account that readl will byte swap.
> + *
> + * If we detect a big endian register interface we also assume that
> + * the controller uses big endian descriptors.
> + */
> + if (!(uhci_readl(uhci, USBPORTSC1) & 0x80)) {
> + uhci->big_endian_mmio = 1;
> + uhci->big_endian_desc = 1;
> + }
Sorry for not noticing this earlier. This is a 16-bit register, so
shouldn't you be accessing it with uhci_readw() instead of
uhci_readl()?
Then the comment could be shortened too, since only the first two byte
values on each line would be needed and the line about readl could go
away.
Apart from this minor detail, the patch series is fine with me. You
can resubmit this last patch if you want to fix it up, and Greg can add
Acked-by: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
to patches 1/5, 3/5, and 5/5.
Alan Stern
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