Hello.
On 09-05-2011 21:46, Jan Andersson wrote:
This patch adds support for big endian GRUSBHC UHCI controllers.
The HCD bus glue will probe the register interface to determine
the endianness of the controller.
Tested on GR-LEON4-ITX board which has a controller with little endian
interface and on custom LEON3 board with a BE controller.
Signed-off-by: Jan Andersson<jan@xxxxxxxxxxx>
[...]
diff --git a/drivers/usb/host/uhci-grlib.c b/drivers/usb/host/uhci-grlib.c
index b1addd6..81f741a 100644
--- a/drivers/usb/host/uhci-grlib.c
+++ b/drivers/usb/host/uhci-grlib.c
@@ -25,6 +25,23 @@ static int uhci_grlib_init(struct usb_hcd *hcd)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ /* Assign function pointers that will be used for register accesses.
+ * Probe to see if we have a big or little endian controller. Bit 7
+ * of PORTSC is always 1 and 15:13 are always zero, so we have:
That's 3 bits, and your picture only has 2 bits zeroed. Also, what about
bits 31:30 that are also zeroed on your picture?
+ *
+ * 1------- 00------ -------- 00------ => Little endian mode HC
+ * 00------ 1------- 00------ -------- => Big endian mode HC
+ *
+ * We also need to take into account that readl will byte swap.
+ *
+ * If we detect a big endian register interface we also assume that
+ * the controller uses big endian descriptors.
+ */
+ if (!(uhci_readl(uhci, USBPORTSC1)& 0x80)) {
+ uhci->big_endian_mmio = 1;
+ uhci->big_endian_desc = 1;
+ }
+
uhci->rh_numports = uhci_count_ports(hcd);
/* Set up pointers to to generic functions */
WBR, Sergei
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