Hi,
> > +static void omap_ehci_soft_phy_reset(struct ehci_hcd_omap *omap, u8
> port)
> > +{
> > + unsigned reg = 0;
> > +
> > + reg = ULPI_FUNC_CTRL_RESET | ULPI_FUNC_CTRL_SUSPENDM
>
> suspendm should be done when we remove the driver (omap_sotp_ehc), to
> put transceiver is lower power mode.
ULPI_FUNC_CTRL_SUSPENDM is getting set to '1' which means PHY is not
in low power mode.
>
> > + /* FUNCTION_CTRL_SET register */
> > + | (ULPI_SET(ULPI_FUNC_CTRL) <<
> EHCI_INSNREG05_ULPI_REGADD_SHIFT)
> > + /* Write */
> > + | (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT)
> > + /* PORTn */
> > + | ((port + 1) << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT)
> > + /* start ULPI access*/
> > + | (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT);
> > +
> > + ehci_omap_writel(omap->ehci_base, EHCI_INSNREG05_ULPI, reg);
>
> do you need to poll for reset done ? (when reset bit is cleared?)
There is a bit which would show that ULPI command (RESET here)
is completed. As it's write operation so do we need to wait for
this bit ?
Thanks,
Ajay
>
> --
> balbi
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