Re: [PATCH 177/220] USB: isp1760: Flush the D-cache for the pipe-in transfer buffers

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Hi Greg,

On Tue, 2010-03-02 at 23:38 +0000, Greg Kroah-Hartman wrote:
> When the HDC driver writes the data to the transfer buffers it pollutes
> the D-cache (unlike DMA drivers where the device writes the data). If
> the corresponding pages get mapped into user space, there are no
> additional cache flushing operations performed and this causes random
> user space faults on architectures with separate I and D caches
> (Harvard) or those with aliasing D-cache.

Following the recent discussions in this thread (USB HCD and ARM cache
coherency):

http://thread.gmane.org/gmane.linux.usb.general/27072

we may no longer need this patch but change the ARM cache handling to
assume that any newly allocated page cache page is dirty by default (and
the PG_arch_1 bit actually meaning clean rather than dirty).

I think it would be better not to push this to mainline until we clarify
this in the ARM land.

Thanks.

-- 
Catalin

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