On Tue, 2010-03-02 at 21:11 +0900, FUJITA Tomonori wrote: > > > Sorry to be a bit late to the party (on holiday), but I/D coherency > is > > supposed to be taken care of using flush_cache_page in the memory > > mapping routines. > > powerpc does that? To be exact, powerpc doesn't need > flush_cache_page() and handles I/D coherency in the pte modification > code. powerpc uses PG_arch_1 to avoid unnecessarily handling I/D > coherency. Seems that IA64 does the same trick with PG_arch_1. Right. We set PG_arch_1 to avoid doing it again of a given physical page. We assume that it's always cleared when a page is recycled by the page cache and we also clear it in flush_dcache_page() though the need for that later thing is dubious... Cheers, Ben. -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
