Sorry, it was the first time I send something to a Linux kernel list. The format may get messed up, and I'm really really sorry :) We have the same understanding of how TX fifo and Rx fifo are shared. My question is why do we never check RXCSR in shared fifo mode, especially when MUSB_TXCSR_MODE bit is not set? The tx fifo flush code seems to be very different from the rx one. Thanks Freeman On Thu, Jan 28, 2010 at 1:12 PM, Felipe Balbi <felipe.balbi@xxxxxxxxx> wrote: > Hi, > > your whole mail is unreadable... really. > > On Thu, Jan 28, 2010 at 09:50:50PM +0100, ext Freeman Wang wrote: >> >> Felipe told me that he thought rx actually uses tx fifo but he never >> actually tested it on a shared fifo chip, so he recommended me to ask >> the group for help. I checked the code and found there are only two > > What I said is: > > "when using *shared fifo* the TX fifo is indeed shared between RX and TX, > that's why there's that MUSB_TXCSR_MODE bit which tells us if the ep is > working in tx or rx mode. > > -- > balbi > -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
