Il 22/02/25 09:33, Chunfeng Yun (云春峰) ha scritto:
On Tue, 2025-02-18 at 09:57 +0100, AngeloGioacchino Del Regno wrote:
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Il 15/02/25 11:06, Chunfeng Yun ha scritto:
There are three USB controllers on mt8196, each controller's wakeup
control is different, add some specific versions for them.
Signed-off-by: Chunfeng Yun <chunfeng.yun@xxxxxxxxxxxx>
Since all of the USB controllers of the MT8196 SoC are behind MTU3,
and
since the wakeup control for all of them will be handled by the MTU3
driver
and *not* by the xhci-mtk driver....
NACK!
Please drop this commit.
Please help to pick up these patches, I also hate to add these specific
wakeup ways, but our haredware designer do not follow the hwip rules
sometimes.
That makes this commit have sense, then.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
Thank you.
Cheers,
Angelo
---
v3: no changes
v2: modify marcos name
---
drivers/usb/host/xhci-mtk.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-
mtk.c
index 904831344440..3f8e37b25322 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -113,6 +113,14 @@
#define WC1_IS_P_95 BIT(12)
#define WC1_IS_EN_P0_95 BIT(6)
+/* mt8196 */
+#define PERI_WK_CTRL0_8196 0x08
+#define WC0_IS_EN_P0_96 BIT(0)
+#define WC0_IS_EN_P1_96 BIT(7)
+
+#define PERI_WK_CTRL1_8196 0x10
+#define WC1_IS_EN_P2_96 BIT(0)
+
/* mt2712 etc */
#define PERI_SSUSB_SPM_CTRL 0x0
#define SSC_IP_SLEEP_EN BIT(4)
@@ -129,6 +137,9 @@ enum ssusb_uwk_vers {
SSUSB_UWK_V1_4, /* mt8195 IP1 */
SSUSB_UWK_V1_5, /* mt8195 IP2 */
SSUSB_UWK_V1_6, /* mt8195 IP3 */
+ SSUSB_UWK_V1_7, /* mt8196 IP0 */
+ SSUSB_UWK_V1_8, /* mt8196 IP1 */
+ SSUSB_UWK_V1_9, /* mt8196 IP2 */
};
/*
@@ -381,6 +392,21 @@ static void usb_wakeup_ip_sleep_set(struct
xhci_hcd_mtk *mtk, bool enable)
msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) |
WC0_IS_P_95;
val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) :
0;
break;
+ case SSUSB_UWK_V1_7:
+ reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196;
+ msk = WC0_IS_EN_P0_96;
+ val = enable ? msk : 0;
+ break;
+ case SSUSB_UWK_V1_8:
+ reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8196;
+ msk = WC0_IS_EN_P1_96;
+ val = enable ? msk : 0;
+ break;
+ case SSUSB_UWK_V1_9:
+ reg = mtk->uwk_reg_base + PERI_WK_CTRL1_8196;
+ msk = WC1_IS_EN_P2_96;
+ val = enable ? msk : 0;
+ break;
case SSUSB_UWK_V2:
reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL;
msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
