This is required for the DWC3 core to reliably detect the connected
phy's Vbus state.
Signed-off-by: André Draszik <andre.draszik@xxxxxxxxxx>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 18d4e7852a1a..ab016fe9b99a 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -1302,6 +1302,7 @@ usbdrd31_dwc3: usb@0 {
interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&usbdrd31_phy 0>, <&usbdrd31_phy 1>;
phy-names = "usb2-phy", "usb3-phy";
+ snps,dis_rxdet_inp3_quirk;
status = "disabled";
};
};
--
2.47.0.338.g60cca15819-goog
