On Wed, Jun 12, 2024 at 08:47:31PM +0800, joswang wrote: > On Wed, Jun 12, 2024 at 3:58 PM Greg KH <gregkh@xxxxxxxxxxxxxxxxxxx> wrote: > > > > On Tue, Jun 11, 2024 at 10:29:53PM +0800, joswang wrote: > > > From: Jos Wang <joswang@xxxxxxxxxx> > > > > > > This is a workaround for STAR 4846132, which only affects > > > DWC_usb31 version2.00a operating in host mode. > > > > > > There is a problem in DWC_usb31 version 2.00a operating > > > in host mode that would cause a CSR read timeout When CSR > > > read coincides with RAM Clock Gating Entry. By disable > > > Clock Gating, sacrificing power consumption for normal > > > operation. > > > > > > Signed-off-by: Jos Wang <joswang@xxxxxxxxxx> > > > --- > > > v1 -> v2: > > > - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch > > > v2 -> v3: > > > - code refactor > > > - modify comment, add STAR number, workaround applied in host mode > > > - modify commit message, add STAR number, workaround applied in host mode > > > - modify Author Jos Wang > > > --- > > > drivers/usb/dwc3/core.c | 20 +++++++++++++++++++- > > > 1 file changed, 19 insertions(+), 1 deletion(-) > > > > Where are patches 1/3 and 2/3 of this series? > > > > thanks, > > > > greg k-h > > Patches 1/3 and 2/3 are other cases. The maintainer is reviewing them > and has no accurate conclusion yet, so only patches 3/3 are submitted. How are we supposed to know this? A patch series should be taken all at once, right? confused, greg k-h
