xHCI specification 5.1 "Register Conventions" states that 64 bit registers should be written in low-high order. All writing operations in xhci is done low-high order following the spec. Add a new quirk to support workaround for high-low order. Signed-off-by: Daehwan Jung <dh10.jung@xxxxxxxxxxx> --- v1 -> v2: - this patch is added newly in the patchset - add setting the hi-lo quirk in xhci platform v2 -> v3: - add description in commit message. --- drivers/usb/host/xhci-plat.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 3d071b8..31bdfa5 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -256,6 +256,9 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s if (device_property_read_bool(tmpdev, "xhci-sg-trb-cache-size-quirk")) xhci->quirks |= XHCI_SG_TRB_CACHE_SIZE_QUIRK; + if (device_property_read_bool(tmpdev, "write-64-hi-lo-quirk")) + xhci->quirks |= XHCI_WRITE_64_HI_LO; + device_property_read_u32(tmpdev, "imod-interval-ns", &xhci->imod_interval); } -- 2.7.4
