On Fri, Feb 16, 2024 at 06:27:47AM +0530, Krishna Kurapati wrote: > Currently the DWC3 driver supports only single port controller which > requires at most two PHYs ie HS and SS PHYs. There are SoCs that has > DWC3 controller with multiple ports that can operate in host mode. > Some of the port supports both SS+HS and other port supports only HS > mode. > > This change primarily refactors the Phy logic in core driver to allow > multiport support with Generic Phy's. > > Changes have been tested on QCOM SoC SA8295P which has 4 ports (2 > are HS+SS capable and 2 are HS only capable). I've dropped these all from my queue (see the other private email thread on the commit response). Please resend when you address the issues Johan raised. And note, please do NOT attempt to poke maintainers in private bug reports to do reviews as that is not how any of this happens, you know this quite well. thanks, greg k-h
