On Tue, Feb 06, 2024 at 10:48:20AM +0530, Krishna Kurapati wrote: > From: Harsh Agarwal <quic_harshq@xxxxxxxxxxx> > > Currently the DWC3 driver supports only single port controller > which requires at least one HS PHY and at most one SS PHY. > > But the DWC3 USB controller can be connected to multiple ports and > each port can have their own PHYs. Each port of the multiport > controller can either be HS+SS capable or HS only capable > Proper quantification of them is required to modify GUSB2PHYCFG > and GUSB3PIPECTL registers appropriately. > > Add support for detecting, obtaining and configuring PHYs supported > by a multiport controller. Limit support to multiport controllers > with up to four ports for now (e.g. as needed for SC8280XP). > > Signed-off-by: Harsh Agarwal <quic_harshq@xxxxxxxxxxx> > Co-developed-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx> > Signed-off-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx> Reviewed-by: Bjorn Andersson <andersson@xxxxxxxxxx> > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c [..] > @@ -740,7 +745,35 @@ static int dwc3_phy_setup(struct dwc3 *dwc) > if (dwc->ulpi_ext_vbus_drv) > reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV; > > - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); > + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); > + > + return 0; > +} > + > +/** The format of this kernel-doc comment is not correct, but it's only moved in this patchset so I think it should be fixed in a separate patch. Regards, Bjorn > + * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core > + * @dwc: Pointer to our controller context structure > + * > + * Returns 0 on success. The USB PHY interfaces are configured but not > + * initialized. The PHY interfaces and the PHYs get initialized together with > + * the core in dwc3_core_init. > + */ > +static int dwc3_phy_setup(struct dwc3 *dwc)
