Hi Andrea, On 12/3/23 10:52, Andrea della Porta wrote: > Hi Minas, > > On 10:26 Fri 01 Dec , Minas Harutyunyan wrote: >> Hi Ivan, >> >> On 11/28/23 18:43, Ivan Ivanov wrote: >>> >>> Hi Minas, >>> >>> On Tue, 2023-11-28 at 11:48 +0000, Minas Harutyunyan wrote: >>>> >>>> Does this "spurious" interrupt broke your tests? >>> >>> It is not just some kind of synthetic test case that was broken. >>> but real world usage. You can find complains about this error on >>> various internet forums, just search for dwc2_hc_chhltd_intr_dma >>> and it is not so difficult to reproduce. >>> >>> Without databook I am not sure we can create better fix, but if >>> you develop different solution I will gladly tested it. >>> >>> Regards, >>> Ivan >> 1. In addition to HCCHARx and ep_type printing please add printing of >> GRXFSTSR if EP is IN or GNPTXSTS if EP is OUT, and provide dmesg with >> error case. > > Here's the log, before comenting the 'goto' out: > > > [684829.206854] --Host Channel Interrupt--, Channel 2 > [684829.206866] hcint 0x00000012, hcintmsk 0x00000006, hcint&hcintmsk 0x00000002 > [684829.206875] hcchar[2] = 0x015c9810, chan->ep_type=3 > [684829.206883] GRXSTSR = 0x000E0002 > [684829.214851] --Host Channel Interrupt--, Channel 6 > [684829.214864] hcint 0x00000012, hcintmsk 0x00000006, hcint&hcintmsk 0x00000002 > [684829.214876] hcchar[6] = 0x015c9810, chan->ep_type=3 > [684829.214886] GRXSTSR = 0x000E0007 > [684829.217853] --Host Channel Interrupt--, Channel 5 > [684829.217869] hcint 0x00000012, hcintmsk 0x00000006, hcint&hcintmsk 0x00000002 > [684829.217881] hcchar[5] = 0x009c8801, chan->ep_type=3 > [684829.217891] GRXSTSR = 0x000E0005 > [684829.222647] --Host Channel Interrupt--, Channel 0 > [684829.222659] hcint 0x00000021, hcintmsk 0x00000426, hcint&hcintmsk 0x00000020 > [684829.222671] hcchar[0] = 0x01d8d200, chan->ep_type=2 > [684829.222681] GRXSTSR = 0x00070044 > [684829.222696] --Host Channel Interrupt--, Channel 0 > [684829.222704] hcint 0x00000002, hcintmsk 0x00000406, hcint&hcintmsk 0x00000002 > [684829.222714] hcchar[0] = 0x01d8d200, chan->ep_type=2 > [684829.222724] GRXSTSR = 0x00070044 > [684829.222740] dwc2 3f980000.usb: dwc2_hc_chhltd_intr_dma: Channel 0 - ChHltd set, but reason is unknown > [684829.222758] dwc2 3f980000.usb: hcint 0x00000002, intsts 0x04000009 Sorry for delayed response. I guess the cause of issue is because of channel halted interrupt late for about ~40-50us. In above log, Channel 0 twice assert interrupt: first for ACK (XferComplete masked) and second for Channel_Halted. These all interrupts related to same BULK IN transfer. Ideally these 3 source of interrupt (ACK, XferCompl and ChHalt) should be asserted together. To check it lets do follow: 1. Do not allow unmask ACK interrupt in function dwc2_hc_enable_dma_ints(). Just comment "hcintmsk |= HCINTMSK_ACK;" 2. remove comment for "goto error" 3. remove printing GRXSTSR and GNPTXSTS 4. build in non verbose debug mode It's just temporary solution to check ACK influence on the issue. Thanks, Minas
