Hello, Similar issue with ZynqMP board related to that patch: xilinx-psgtr fd400000.phy: lane 3 (type 1, protocol 3): PLL lock timeout phy phy-fd400000.phy.3: phy poweron failed --> -110 dwc3 fe300000.usb: error -ETIMEDOUT: failed to initialize core With CONFIG_USB_DWC3_DUAL_ROLE and dr_mode = "host"; It may not be the correct fix. -- Köry Maincent, Bootlin Embedded Linux and kernel engineering https://bootlin.com
