On 21.06.2023 06:36, Krishna Kurapati wrote:
> There is now support for the multiport USB controller this uses so
> enable it.
>
> The board only has a single port hooked up (despite it being wired up to
> the multiport IP on the SoC). There's also a USB 2.0 mux hooked up,
> which by default on boot is selected to mux properly. Grab the gpio
> controlling that and ensure it stays in the right position so USB 2.0
> continues to be routed from the external port to the SoC.
>
> Signed-off-by: Andrew Halaney <ahalaney@xxxxxxxxxx>
> [Krishna: Rebased on top of usb-next]
If that's your only change to this patch, you should have kept the
Author: field unchanged.
> Signed-off-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx>
> ---
Same comments as patch 9
Konrad
> arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> index 24fa449d48a6..53d47593306e 100644
> --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> @@ -309,6 +309,19 @@ &usb_2_qmpphy0 {
> status = "okay";
> };
>
> +&usb_2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb2_en_state>;
> +
> + status = "okay";
> +};
> +
> +&usb_2_dwc3 {
> + dr_mode = "host";
> + phy-names = "usb2-port0", "usb3-port0";
> + phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>;
> +};
> +
> &xo_board_clk {
> clock-frequency = <38400000>;
> };
> @@ -401,4 +414,13 @@ wake-pins {
> bias-pull-up;
> };
> };
> +
> + usb2_en_state: usb2-en-state {
> + /* TS3USB221A USB2.0 mux select */
> + pins = "gpio24";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + output-low;
> + };
> };
