On 6/21/2023 4:22 PM, Greg KH wrote:
> On Wed, Jun 21, 2023 at 05:37:22AM -0500, Sanjay R Mehta wrote:
>> From: Sanath S <Sanath.S@xxxxxxx>
>>
>> Since TMU is enabled by default on Intel SOCs for USB4 before Alpine
>> Ridge, explicit enabling or disabling of TMU is not required.
>>
>> However, the current implementation of enabling or disabling TMU based
>> on CLx state is inadequate as not all SOCs with CLx disabled have TMU
>> enabled by default, such as AMD Yellow Carp and Pink Sardine.
>>
>> To address this, a quirk named "QUIRK_TMU_DEFAULT_ENABLED" is
>> implemented to skip the enabling or disabling of TMU for SOCs where it
>> is already enabled by default, such as Intel SOCs prior to Alpine Ridge.
>>
>> Fixes: 7af9da8ce8f9 ("thunderbolt: Add quirk to disable CLx")
>> Signed-off-by: Sanjay R Mehta <sanju.mehta@xxxxxxx>
>> Signed-off-by: Sanath S <Sanath.S@xxxxxxx>
>
> Wrong ordering :(
My sincere apologies. Mistakenly I sent you the wrong patch. Will send
the correct one. Please ignore this patch.
