On 19.06.2023 10:19, Christian Lamparter wrote:
On 6/19/23 00:46, Anne Macedo wrote:
Cards based on Renesas uPD720202 have their firmware downloaded during
boot by xhci-pci. At this step, the status of the firmware is read and
it takes a while for this read to happen (up to a few seconds). The
macros RENESAS_RETRY and RENESAS_DELAY are used to retry reading this
status byte from PCI a few times. If it can't read the status byte in
RENESAS_RETRY tries, it times out.
However, since this may vary from card to card, these retry and delay
values need to be tweaked. In order to avoid having to patch the code
to
change these values, CONFIG_USB_XHCI_PCI_RENESAS_RETRY and
CONFIG_USB_XHCI_PCI_RENESAS_DELAY are introduced.
If applied, this patch helps to fix errors such as:
ROM Download Step 34 failed at position 136 bytes
Firmware Download Step 2 failed at position 8 bytes with (-110)
while loading xhci-pci when using these cards.
This error in particular has been noticed by this e-mail [1].
[1] https://lore.kernel.org/lkml/20190626070658.GP2962@vkoul-mobl/
Can you tell me on what hardware (is it something older, with maybe
a Synopsys/Designware PCIe host controller?) do you experience these
errors and what delay+retry values are you configuring in order to
get your DUT up an running?
It's a PH61 Rev 1.2 board with the Renesas uPD720201 host controller.
I'm using 10 as the delay and 6000 as the retry.
From what I can tell, the quoted [1] link to Vinod's mail was just
an update during development. This was v3 of the patch series back
then (and it went on to v10 I think, so this wasn't an issue with
what's in the kernel right now).
I see. That was the only reference I found to the timeout error I was
seeing, so that's why I decided to tweak these retry+delay values.
Note: If you are interested I still got the "uPD720201/uPD720202 User's
Manual" back then from Renesas site. (Nowadays they want you to
register or something.). This document was the base for the code and
maybe there's something in there you can quote to extend the
retries/delays.
Definitely interested! I did find a .pdf on Google though, I can check
it.
(From what I vaguely remember. Most of the transfer was fast and
no retries where necessary, but some register write took so long.
Vinod also posted hints about a newer firmware for the
uPD720201/uPD720202. Have you tried that as well?)
I was using the upd72020x-fw AUR package on my Arch Linux build,
if that's any relevant. However, it's quite old and I don't really know
how it works. I missed these hints, sorry, could you point me to
them?
Regards,
Christian
