On 26-04-23, 13:29, Dmitry Rokosov wrote: > Previously, all Amlogic boards used the XTAL clock as the default board > clock for the USB PHY input, so there was no need to enable it. > However, with the introduction of new Amlogic SoCs like the A1 family, > the USB PHY now uses a gated clock. Hence, it is necessary to enable > this gated clock during the PHY initialization sequence, or disable it > during the PHY exit, as appropriate. Applied to phy/next, thanks -- ~Vinod
