On 2/10/2023 7:47 PM, Mika Westerberg wrote: > On Fri, Feb 10, 2023 at 07:32:13PM +0530, Sanjay R Mehta wrote: >> >> >> On 2/10/2023 7:25 PM, Mika Westerberg wrote: >>> Hi, >>> >>> On Fri, Feb 10, 2023 at 07:32:23AM -0600, Sanjay R Mehta wrote: >>>> From: Sanjay R Mehta <sanju.mehta@xxxxxxx> >>>> >>>> AMD Yellow Carp and Pink Sardine don't support CLx state, >>>> hence disabling it. >>> >>> The lane adapters are supposed to announce whether CL-states are >>> supported or not. Is that not the case with the AMD hardware? >> >> Yes Mika. it doesn't work for AMD hardware. > > :-( > > Okay can you then add a quirk for this to quirks.c? Did you meant like below, is this fine? diff --git a/drivers/thunderbolt/nhi.h b/drivers/thunderbolt/nhi.h index b071802..138c649 100644 --- a/drivers/thunderbolt/nhi.h +++ b/drivers/thunderbolt/nhi.h @@ -49,6 +49,7 @@ struct tb_nhi_ops { }; extern const struct tb_nhi_ops icl_nhi_ops; +extern bool clx_enabled; ...... ...... diff --git a/drivers/thunderbolt/quirks.c b/drivers/thunderbolt/quirks.c index b5f2ec7..9ceef7c 100644 --- a/drivers/thunderbolt/quirks.c +++ b/drivers/thunderbolt/quirks.c @@ -63,4 +63,10 @@ void tb_check_quirks(struct tb_switch *sw) q->hook(sw); } + + /* + * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms. + */ + if (tb_switch_is_yellow_carp(sw->tb->nhi) || tb_switch_is_pink_sardine(sw->tb->nhi)) + clx_enabled = false; } diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c index 363d712..d4492b5 100644 --- a/drivers/thunderbolt/switch.c +++ b/drivers/thunderbolt/switch.c @@ -26,7 +26,7 @@ struct nvm_auth_status { u32 status; }; -static bool clx_enabled = true; +bool clx_enabled = true; module_param_named(clx, clx_enabled, bool, 0444); MODULE_PARM_DESC(clx, "allow low power states on the high-speed lanes (default: true)"); ........ ........