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David Brownell <dbrownell@xxxxxxxxxxxxxxxxxxxxx>
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Subject: [PATCH] add i.MX35 support to the mxc-ehci controller
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	5.53

Hi,

The following patch adds the missing pieces to add i.MX35 support to the
mxc-ehci controller.
I tested in on current next but it also works on 2.6.32-rc5 with the
relevant mxc-ehci patches from Daniel Mack applied.

Please consider including this for the next merge window.

Sascha


>From bb35ec00f1d61fb61ec899fa9dc77147f8a0b796 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
Date: Fri, 30 Oct 2009 14:43:41 +0100
Subject: [PATCH 3/4] i.MX35 USB support

Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
 arch/arm/plat-mxc/ehci.c                  |   48 +++++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/mxc_ehci.h |    1 +
 2 files changed, 49 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 41599be..79917c6 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -38,6 +38,21 @@
 #define MX31_H1_PM_BIT		(1 << 8)
 #define MX31_H1_DT_BIT		(1 << 4)
 
+#define MX35_OTG_SIC_SHIFT	29
+#define MX35_OTG_SIC_MASK	(0xf << MX31_OTG_SIC_SHIFT)
+#define MX35_OTG_PM_BIT		(1 << 24)
+#define MX35_OTG_XCS_BIT	(1 << 10)
+
+#define MX35_H_SIC_SHIFT	21
+#define MX35_H_SIC_MASK		(0xf << MX35_H_SIC_SHIFT)
+#define MX35_H_PM_BIT		(1 << 16)
+#define MX35_H_XCS_BIT		(1 << 9)
+#define MX35_H_IP_PUIDP_BIT	(1 << 8)
+#define MX35_H_IP_PUE_UP_BIT	(1 << 7)
+#define MX35_H_IP_PUE_DWN_BIT	(1 << 6)
+#define MX35_H_DT_BIT		(1 << 5)
+#define MX35_H_TE_BIT		(1 << 4)
+
 int mxc_set_usbcontrol(int port, unsigned int flags)
 {
 	unsigned int v;
@@ -84,6 +99,39 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
 		return 0;
 	}
 
+	if (cpu_is_mx35()) {
+		v = readl(IO_ADDRESS(MX35_OTG_BASE_ADDR +
+				     USBCTRL_OTGBASE_OFFSET));
+		switch (port) {
+		case 0: /* OTG port */
+			v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT);
+			v |= (flags & MXC_EHCI_INTERFACE_MASK)
+					<< MX35_OTG_SIC_SHIFT;
+			if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+				v |= MX35_OTG_PM_BIT;
+
+			break;
+		case 1: /* Host port */
+			v &= ~(MX35_H_SIC_SHIFT | MX35_H_PM_BIT);
+			v |= (flags & MXC_EHCI_INTERFACE_MASK)
+					<< MX35_H_SIC_SHIFT;
+			if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+				v |= MX35_H_PM_BIT;
+			if (!(flags & MXC_EHCI_TTL_ENABLED))
+				v |= MX35_H_DT_BIT;
+			if (flags & MXC_EHCI_INTERNAL_TRANSCEIVER)
+				v |= MX35_H_TE_BIT | MX35_H_IP_PUE_DWN_BIT;
+			break;
+		default:
+			printk(KERN_ERR "%s: unknown port %d\n", __func__, port);
+			return -EINVAL;
+		}
+
+		writel(v, IO_ADDRESS(MX35_OTG_BASE_ADDR +
+				     USBCTRL_OTGBASE_OFFSET));
+		return 0;
+	}
+
 	printk(KERN_WARNING
 		"%s() unable to setup USBCONTROL for this CPU\n", __func__);
 	return -EINVAL;
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
index 8f79623..5998222 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
@@ -21,6 +21,7 @@
 
 #define MXC_EHCI_POWER_PINS_ENABLED	(1 << 5)
 #define MXC_EHCI_TTL_ENABLED		(1 << 6)
+#define MXC_EHCI_INTERNAL_TRANSCEIVER	(1 << 7)
 
 struct mxc_usbh_platform_data {
 	int (*init)(struct platform_device *pdev);
-- 
1.6.5

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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