Re: [RFC v4 2/5] usb: dwc3: core: Refactor PHY logic to support Multiport Controller

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On 1/21/2023 4:27 AM, Thinh Nguyen wrote:
On Thu, Jan 19, 2023, Thinh Nguyen wrote:
Hi,

On Sun, Jan 15, 2023, Krishna Kurapati wrote:
Currently the DWC3 driver supports only single port controller
which requires at most one HS and one SS PHY.

Add note here that multi-port is for host mode for clarity.


But the DWC3 USB controller can be connected to multiple ports and
each port can have their own PHYs. Each port of the multiport
controller can either be HS+SS capable or HS only capable
Proper quantification of them is required to modify GUSB2PHYCFG
and GUSB3PIPECTL registers appropriately.

Add support for detecting, obtaining and configuring phy's supported
by a multiport controller and limit the max number of ports
supported to 4.

Signed-off-by: Harsh Agarwal <quic_harshq@xxxxxxxxxxx>
Signed-off-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx>
---
  drivers/usb/dwc3/core.c | 304 +++++++++++++++++++++++++++++-----------
  drivers/usb/dwc3/core.h |  15 +-
  drivers/usb/dwc3/drd.c  |  14 +-
  3 files changed, 244 insertions(+), 89 deletions(-)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 476b63618511..7e0a9a598dfd 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -120,7 +120,7 @@ static void __dwc3_set_mode(struct work_struct *work)
  {
  	struct dwc3 *dwc = work_to_dwc(work);
  	unsigned long flags;
-	int ret;
+	int ret, i;

Can we declare variables in separate lines here and other places.

  	u32 reg;
  	u32 desired_dr_role;
@@ -200,8 +200,10 @@ static void __dwc3_set_mode(struct work_struct *work)
  		} else {
  			if (dwc->usb2_phy)
  				otg_set_vbus(dwc->usb2_phy->otg, true);
-			phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST);
-			phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST);
+			for (i = 0; i < dwc->num_ports; i++) {

BTW, is num_ports the total of usb2 + usb3 ports?
Hi Thinh,

No, num_ports is just the total number of hw usb ports present (presuming each port is hs capable, this is just the number of HS Phy's available).

Regards,
KRishna,

+				phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST);
+				phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST);
+			}
  			if (dwc->dis_split_quirk) {

Thanks,
Thinh



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