On 1/9/2023 11:09 AM, Linyu Yuan wrote:
On 1/9/2023 11:02 AM, Jun Li (OSS) wrote:
-----Original Message-----
From: Linyu Yuan <quic_linyyuan@xxxxxxxxxxx>
Sent: Friday, January 6, 2023 5:22 PM
To: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>; Thinh Nguyen
<Thinh.Nguyen@xxxxxxxxxxxx>
Cc: linux-usb@xxxxxxxxxxxxxxx; Jack Pham <quic_jackp@xxxxxxxxxxx>;
Wesley
Cheng <quic_wcheng@xxxxxxxxxxx>; Linyu Yuan <quic_linyyuan@xxxxxxxxxxx>
Subject: [PATCH 1/3] usb: dwc3: simplify operation in dwc3_readl() and
dwc3_writel()
when dwc3_readl() read register and dwc3_writel() write register,
it will run operation 'base + offset - DWC3_GLOBALS_REGS_START' to
calculate register address, seem the minus operation can avoid.
the original register definition is offset from XHCI base 0x0,
now change it to offset from DWC3_GLOBALS_REGS_START(0xc100).
Is this really can bring benefit? With this change user has to takes
I didn't check all compiler generated code and if more instruction
needed for original code.
care an offset, looks to me the original definition is very
straightforward,
use the offset defined in DWC3 Databook, user can directly check each
register
definition by offset (not just by name).
this is good point, let me check one compile code and make a decision
to remove this change or not.
will remove this one as no difference in generated asm code.
Li Jun
Signed-off-by: Linyu Yuan <quic_linyyuan@xxxxxxxxxxx>
---
drivers/usb/dwc3/core.h | 150
++++++++++++++++++++++-----------------------
drivers/usb/dwc3/debugfs.c | 2 +-
drivers/usb/dwc3/io.h | 12 ++--
3 files changed, 82 insertions(+), 82 deletions(-)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 8f9959b..3af244e 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -85,90 +85,90 @@
#define DWC3_OTG_REGS_END 0xccff
/* Global Registers */
-#define DWC3_GSBUSCFG0 0xc100
-#define DWC3_GSBUSCFG1 0xc104
-#define DWC3_GTXTHRCFG 0xc108
-#define DWC3_GRXTHRCFG 0xc10c
-#define DWC3_GCTL 0xc110
-#define DWC3_GEVTEN 0xc114
-#define DWC3_GSTS 0xc118
-#define DWC3_GUCTL1 0xc11c
-#define DWC3_GSNPSID 0xc120
-#define DWC3_GGPIO 0xc124
-#define DWC3_GUID 0xc128
-#define DWC3_GUCTL 0xc12c
-#define DWC3_GBUSERRADDR0 0xc130
-#define DWC3_GBUSERRADDR1 0xc134
-#define DWC3_GPRTBIMAP0 0xc138
-#define DWC3_GPRTBIMAP1 0xc13c
-#define DWC3_GHWPARAMS0 0xc140
-#define DWC3_GHWPARAMS1 0xc144
-#define DWC3_GHWPARAMS2 0xc148
-#define DWC3_GHWPARAMS3 0xc14c
-#define DWC3_GHWPARAMS4 0xc150
-#define DWC3_GHWPARAMS5 0xc154
-#define DWC3_GHWPARAMS6 0xc158
-#define DWC3_GHWPARAMS7 0xc15c
-#define DWC3_GDBGFIFOSPACE 0xc160
-#define DWC3_GDBGLTSSM 0xc164
-#define DWC3_GDBGBMU 0xc16c
-#define DWC3_GDBGLSPMUX 0xc170
-#define DWC3_GDBGLSP 0xc174
-#define DWC3_GDBGEPINFO0 0xc178
-#define DWC3_GDBGEPINFO1 0xc17c
-#define DWC3_GPRTBIMAP_HS0 0xc180
-#define DWC3_GPRTBIMAP_HS1 0xc184
-#define DWC3_GPRTBIMAP_FS0 0xc188
-#define DWC3_GPRTBIMAP_FS1 0xc18c
-#define DWC3_GUCTL2 0xc19c
--
2.7.4
