https://bugzilla.kernel.org/show_bug.cgi?id=216728 --- Comment #11 from Chris Chiu (chris.chiu@xxxxxxxxxxxxx) --- Created attachment 303316 --> https://bugzilla.kernel.org/attachment.cgi?id=303316&action=edit dmesg with PCI_DEBUG [ 35.907673] pcieport 0000:03:02.0: waiting 100 ms for downstream link, after activation [ 35.907687] pcieport 0000:03:00.0: waiting 100 ms for downstream link, after activation [ 37.038857] xhci_hcd 0000:38:00.0: waiting additional 100 ms to become accessible [ 37.039165] thunderbolt 0000:04:00.0: restoring config space at offset 0x14 (was 0x0, writing 0x9df40000) [ 37.039181] thunderbolt 0000:04:00.0: restoring config space at offset 0x10 (was 0x0, writing 0x9df00000) [ 37.039196] thunderbolt 0000:04:00.0: restoring config space at offset 0x4 (was 0x100000, writing 0x100406) [ 37.146904] xhci_hcd 0000:38:00.0: Unable to change power state from D3cold to D0, device inaccessible [ 37.148017] pcieport 0000:03:02.0: re-enabling LTR -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
