On Sun, Apr 24, 2022 at 5:28 PM Guenter Roeck <linux@xxxxxxxxxxxx> wrote: > On 4/24/22 01:52, Arnd Bergmann wrote: > > On Sun, Apr 24, 2022 at 4:09 AM Guenter Roeck <linux@xxxxxxxxxxxx> wrote: > > into the defconfig file, otherwise the multiplatform target defaults to > > an ARMv7 instead of ARMv5 build. For an OMAP15xx as in the SX1, > > you also need to enable CONFIG_ARCH_MULTI_V4T. > > > > This is slightly unfortunate, but I don't see any way to avoid it, and the > > modified defconfig will still work fine with older kernel trees. > > > > Yes, that works. I changed it in my configuration. Ok, great!. I managed to boot the z2 machine with PCMCIA support and it gets around the issue with my patch, correctly detecting the CF card. > >>> One thing I keep having to apply myself is this snippet: > >>> > >>> diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S > >>> index 0bfad62ea858..87c695703580 100644 > >>> --- a/arch/arm/mm/proc-arm925.S > >>> +++ b/arch/arm/mm/proc-arm925.S > >>> @@ -441,7 +441,6 @@ __arm925_setup: > >>> > >>> #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH > >>> mov r0, #4 @ disable write-back > >>> on caches explicitly > >>> - mcr p15, 7, r0, c15, c0, 0 > >>> #endif > >> > >> it does not have CONFIG_CPU_DCACHE_WRITETHROUGH enabled. > > > > Maybe it was disabled explicitly for the sx1_defconfig because of this > > bug. I would think that this is required for actual sx1 hardware because the > > option is default-enabled for ARM925T, and that CPU core is exclusively > > used in OMAP15xx. > > > > That looks like a bug in qemu. ARM925T instruction support is limited to V4T > instructions. qemu doesn't have explicit 5T support. It is either V4T > or V5. I'm not entirely sure what instructions the CPU supports, but Linux treats it as ARMv4T as well, and qemu supports some of the 925t specific instructions as "ti925t" in target/arm/cpu_tcg.c, it just seems it's missing some others. Arnd