Hi,
On Sat, Mar 26, 2022 at 10:17:49PM +0100, Janusz Krzysztofik wrote:
> Dnia wtorek, 22 marca 2022 20:07:53 CET Aaro Koskinen pisze:
> > On Tue, Mar 22, 2022 at 06:36:48PM +0200, Aaro Koskinen wrote:
> > > Something is still broken. When doing kexec (using CCF kernel), the
> > > kexec'ed kernel now hangs early (on 770):
> > [...]
> > > [ 0.928863] calling omap1_init_devices+0x0/0x2c @ 1
> >
> > It hangs in omap_sram_reprogram_clock() (<- omap1_select_table_rate()
> > <- omap1_clk_late_init()).
>
> I've reviewed my changes but haven't found anything suspicious.
The below change is fixing the kexec boot. Based on the comment in the
code, it seems this clock is needed for the SRAM to work.
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index e33e11f826af..b8b4876ff935 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -285,7 +285,7 @@ static struct omap1_clk tc1_ck = {
*/
static struct omap1_clk tc2_ck = {
- .hw.init = CLK_HW_INIT("tc2_ck", "tc_ck", &omap1_clk_gate_ops, 0),
+ .hw.init = CLK_HW_INIT("tc2_ck", "tc_ck", &omap1_clk_gate_ops, CLK_IS_CRITICAL),
.ops = &clkops_generic,
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_TC2_CK,
A.
