It appears that the PIPE clock should not be selected when only USB 2.0
is being used in the design and no USB 3.0 reference clock is used. Fix
to set the correct value depending on whether a USB3 PHY is present.
Fixes: 84770f028fab ("usb: dwc3: Add driver for Xilinx platforms")
Signed-off-by: Robert Hancock <robert.hancock@xxxxxxxxxx>
---
drivers/usb/dwc3/dwc3-xilinx.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c
index 9cc3ad701a29..dd6218d05159 100644
--- a/drivers/usb/dwc3/dwc3-xilinx.c
+++ b/drivers/usb/dwc3/dwc3-xilinx.c
@@ -167,8 +167,12 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data)
/* Set PIPE Power Present signal in FPD Power Present Register*/
writel(FPD_POWER_PRSNT_OPTION, priv_data->regs + XLNX_USB_FPD_POWER_PRSNT);
- /* Set the PIPE Clock Select bit in FPD PIPE Clock register */
- writel(PIPE_CLK_SELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK);
+ /*
+ * Set the PIPE Clock Select bit in FPD PIPE Clock register if a USB3
+ * PHY is in use, deselect otherwise
+ */
+ writel(usb3_phy ? PIPE_CLK_SELECT : PIPE_CLK_DESELECT,
+ priv_data->regs + XLNX_USB_FPD_PIPE_CLK);
ret = reset_control_deassert(crst);
if (ret < 0) {
--
2.31.1
