> > > This part is being done at musb_host_rx()
> >
> > You're doing it in musb_host_tx() actually. Although musb_host_rx()
> > is also broken WRT the isochronous transfers.
> >
> > > doing next packet programming within same urb and *not* starting next
> > urb. Thus musb_start_urb() doesn't come into this path.
> >
> > What? Read the code, please -- musb_start_urb() call should always
> > precede musb_host_tx() which handles the DMA interrupt. Unless something
> > clears DMAReqEnab after musb_start_urb() call, setting it only once
> > should work.
>
> musb_start_urb() call does precede musb_host_tx() but when urb is
> *completed*.
I think you are aware that there are multiple packets within same isochronous urb and musb_start_urb() programs only for first packet.
============================================================
case USB_ENDPOINT_XFER_ISOC:
qh->iso_idx = 0;
qh->frame = 0;
offset = urb->iso_frame_desc[0].offset;
len = urb->iso_frame_desc[0].length;
============================================================
-Ajay
>
> check the 'done' flag and musb_advance_schedule getting called in the
> path.
>
> if (done) {
> /* set status */
> urb->status = status;
> urb->actual_length = qh->offset;
> musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT);
> return;
> } else if (usb_pipeisoc(pipe) && dma) {
> if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb,
> offset, length)) {
> if (is_cppi_enabled() || tusb_dma_omap()
> || is_cppi41_enabled())
> musb_h_tx_dma_start(hw_ep);
> return;
> }
>
>
> >
> > > So it wouldn't start the DMAs.
> > >
> >
> > How musb_host_tx() can be called without musb_start_urb()?
> >
> > > In case of PIO, it does load the FIFO and sets the TXPKTREADY.
> > >
> >
> > Only is URB_ISO_ASAP is not set.
> >
> > WBR, Sergei
> >
> > > -Ajay
> >
> > WBR, Sergei
> >
> >
>
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