On Wed, 26 Aug 2009, Steve Calfee wrote: > > We are using the existing kernel code. Our USB host controller is EHCI > > with built-in Transaction Translator. > > > > This is fascinating. How would ehci know how to run a FS isoc device? > This comes back to my theory that the ARC core does not have a TT, it > just downshifts the speed of the transfer for a direct connect FS > device. Is there some standard ehci option for handling FS devices > that I am not aware of? > I need more info. What is the hardware trace? The fact that software > sees some things as being there and your "hardware trace" does not > suggests to me a cache coherency issue. Steve, there's an important point you seem to be missing. Julie is not talking about a commercial EHCI controller. This is a new controller, being developed at Xilinx, using the ARC "embedded-TT" idea but with (as far as I know) an independent implementation, still under testing. Alan Stern -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
