On Tue, Aug 17, 2021 at 06:28:59PM -0700, Jack Pham wrote:
> On Thu, Aug 12, 2021 at 01:26:35AM -0700, Jack Pham wrote:
> > On DWC_usb3 revisions 3.00a and newer (including DWC_usb31 and
> > DWC_usb32) the GUCTL1 register gained the DEV_DECOUPLE_L1L2_EVT
> > field (bit 31) which when enabled allows the controller in device
> > mode to treat USB 2.0 L1 LPM & L2 events separately.
> >
> > After commit d1d90dd27254 ("usb: dwc3: gadget: Enable suspend
> > events") the controller will now receive events (and therefore
> > interrupts) for every state change when entering/exiting either
> > L1 or L2 states. Since L1 is handled entirely by the hardware
> > and requires no software intervention, there is no need to even
> > enable these events and unnecessarily notify the gadget driver.
> > Enable the aforementioned bit to help reduce the overall interrupt
> > count for these L1 events that don't need to be handled while
> > retaining the events for full L2 suspend/wakeup.
>
> Hi folks in To:
>
> I'd like to request if any of you could help test this patch on your
> boards to help make sure it doesn't cause any regressions since I know
> some of the recent dwc3 patches from Qualcomm have been found to break
> other devices :(. So I'm hoping to avoid that even for a patch as
> small as this.
>
> Hoping this could be tried out on boards/SoCs such as db845c, hikey960,
> Exynos, the Intel "lakes", etc. Ideally this needs validation with a
> high-speed connection to a USB 3.x host, which increases the chances
> that USB 2.0 Link Power Management is supported.
>
> The overall goal of this patch is to eliminate events generated for
> L1 entry/exit, so we should see a slight reduction in interrupt counts
> when checking `grep dwc3 /proc/interrupts` for comparable traffic.
Unfortunately I'm quite busy lately with more important stuff and I dunno if I
will be able to test this in reasonable time. So, if Ferry volunteers, then we
can cover Intel Merrifield platform as well.
--
With Best Regards,
Andy Shevchenko
