If ctrl EP priming is failed (very rare case in standard linux), hw_ep_set_halt goes infinite loop. waiting 100 times was enough for zynq7000. Signed-off-by: Jeaho Hwang <jhhwang@xxxxxxxxxx> diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c index 8834ca613721..d73fadb18f32 100644 --- a/drivers/usb/chipidea/udc.c +++ b/drivers/usb/chipidea/udc.c @@ -209,6 +209,9 @@ static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) return 0; } +/* enough for zynq7000 evaluation board */ +#define HW_EP_SET_HALT_COUNT_MAX 100 + /** * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute * without interruption) @@ -221,6 +224,7 @@ static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) */ static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) { + int count = HW_EP_SET_HALT_COUNT_MAX; if (value != 0 && value != 1) return -EINVAL; @@ -232,9 +236,9 @@ static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) /* data toggle - reserved for EP0 but it's in ESS */ hw_write(ci, reg, mask_xs|mask_xr, value ? mask_xs : mask_xr); - } while (value != hw_ep_get_halt(ci, num, dir)); + } while (value != hw_ep_get_halt(ci, num, dir) && --count > 0); - return 0; + return count ? 0 : -EAGAIN; } /** -- 2.25.1