In order to support OTG mode we need these new properties:
- interrupt
- nvidia,pmc
Add the new properties to the binding.
Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
---
.../bindings/phy/nvidia,tegra20-usb-phy.yaml | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml
index 593187234e6a..dfde0eaf66e1 100644
--- a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml
@@ -77,6 +77,9 @@ properties:
- const: timer
- const: utmi-pads
+ interrupts:
+ maxItems: 1
+
resets:
oneOf:
- maxItems: 1
@@ -199,6 +202,15 @@ properties:
maxItems: 1
description: GPIO used to reset the PHY.
+ nvidia,pmc:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: Phandle to Power Management controller.
+ - description: USB controller ID.
+ description:
+ Phandle to Power Management controller.
+
required:
- compatible
- reg
@@ -320,6 +332,7 @@ examples:
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x7d008000 0x4000>,
<0x7d000000 0x4000>;
+ interrupts = <0 97 4>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB3>,
<&tegra_car TEGRA124_CLK_PLL_U>,
@@ -338,6 +351,7 @@ examples:
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
+ nvidia,pmc = <&tegra_pmc 2>;
};
- |
@@ -346,6 +360,7 @@ examples:
usb-phy@c5004000 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5004000 0x4000>;
+ interrupts = <0 21 4>;
phy_type = "ulpi";
clocks = <&tegra_car TEGRA20_CLK_USB2>,
<&tegra_car TEGRA20_CLK_PLL_U>,
@@ -354,4 +369,5 @@ examples:
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
+ nvidia,pmc = <&tegra_pmc 1>;
};
--
2.32.0
